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 4-Channel Low Capacitance ESD Protection Arrays CM1225
Features
* * * * * * * *
Four channels of ESD protection Provides ESD protection to IEC61000-4-2 Level 4 * 8kV contact discharge Low channel input capacitance of 0.8pF (typically) Channel input capacitance matching (I/O to I/O) of 0.02pF (typically) is ideal for differential signals Minimal capacitance change for temperature and voltage Zener diode eliminates the need for external bypass capacitors Each I/O pin can withstand over 1000 ESD strikes* Available in a RoHS compliant (lead-free) package
Product Description
The CM1225 diode array has been designed to provide ESD protection for electronic components or subsystems requiring minimal capacitive loading. This device is ideal for protecting systems with high data and clock rates or for circuits requiring low capacitive loading. Each ESD channel consists of a pair of diodes in series which steer the positive or negative ESD current pulse to the ground pins (VN). A Zener diode is embedded between the positive terminal of the diode pair to the ground. This eliminates the need for an external bypass capacitor to absorb positive ESD strikes to ground. The CM1225 protects against ESD pulses up to 8kV per the IEC 61000-4-2 standard. The CM1225 is particularly well-suited for protecting systems using high-speed ports such as HDMI, DVI, display, MDDI, USB 2.0, Serial ATA, IEEE1394 (FireWire and i.LINK), corresponding ports in removable storage, digital camcorders, DVD-RW drives and other applications where extremely low loading capacitance with ESD protection are required in a small package footprint. The CM1225 is available in a RoHS-compliant, uUDFN 10-pin package.
Applications
* * * * * * * *
HDMI ports, DVI ports in notebooks, set top boxes, digital TVs, and LCD displays Display and MDDI ports Serial ATA ports in desktop PCs and hard disk drives PCI Express ports USB2.0 ports at 480Mbps in desktop PCs, notebooks and peripherals IEEE1394 FireWire ports at 400Mbps / 800Mbps General purpose high-speed data line ESD protection Protection of interface ports or IC pins which are exposed to high ESD levels
*Standard test condition is IEC61000-4-2 level 4 test circuit with each pin subjected to 8kV contact discharge for 1000 pulses. Discharges are timed at 1 second intervals and all 1000 strikes are completed in one continuous test run. The part is then subjected to standard production test to verify that all of the tested parameters are within spec after the 1000 strikes.
(c)2010 SCILLC. All rights reserved. April 2010 - Rev. 2
Publication Order Number: CM1225/D
CM1225
Pin Descriptions
4-CHANNEL, 10-LEAD, UUDFN-10 PACKAGE
Pin 1 2 3 4 5 6 7 8 9 10 Name CH1 CH2 VN CH3 CH4 NC NC VN NC NC GND Type I/O I/O GND I/O I/O ESD Channel ESD Channel Ground ESD Channel ESD Channel No Connect No Connect Ground No Connect No Connect Description
Rev. 2 | Page 2 of 11 | www.onsemi.com
4-Channel Low Capacitance ESD Protection Arrays CM1225
Ordering Information
PART NUMBERING INFORMATION
Lead-free Finish # of Channels 4 Leads 10 Package uUDFN-10 Ordering Part Number CM1225-04DE
1
Part Marking 1225
Note 1: Parts are shipped in Tape and Reel form unless otherwise specified.
Specifications
ABSOLUTE MAXIMUM RATINGS
PARAMETER Operating Temperature Range Storage Temperature Range DC Voltage at any channel input RATING -40 to +85 -65 to +150 - 0.5 to 5.5 UNITS C C V
STANDARD OPERATING CONDITIONS
PARAMETER Operating Temperature Range RATING -40 to +85 UNITS C
(c)2010 SCILLC. All rights reserved. April 2010 - Rev. 2
Publication Order Number: CM1225/D
CM1225
(SEE NOTE 1)
ELECTRICAL OPERATING CHARACTERISTICS
SYMBOL VF PARAMETER Diode Forward Voltage Top Diode Bottom Diode Channel Leakage Current Channel Input Capacitance Channel Input Capacitance Matching ESD Protection - Peak Discharge Voltage at any channel input, in system: Contact discharge per IEC 61000-4-2 standard Channel Clamp Voltage Positive Transients Negative Transients Dynamic Resistance Positive Transients Negative Transients CONDITIONS IF = 10mA; TA=25uC; Note 2 TA=25 VIN=3.3V, VN=0V C; At 1 MHz, VN=0V, VIN=1.65V At 1 MHz, VN=0V, VIN=1.65V
MIN 0.65 -1.20
TYP 0.85 -0.85 0.1 0.80 0.02
MAX 1.20 -0.65 1.0 1. 0
UNITS V V A pF pF
ILEAK CIN
C
IN
VESD
TA=25 C; Notes 2 and 3 TA=25 IPP = 1A, C, tP = 8/20S; Note 3 IPP = 1A, tP = 8/20S Any I/O pin to Ground; Note 3
8 +10.0 -4.5
kV V V
VCL
RDYN
1.3 1.3

Note 1: All parameters specified at TA = -40 to +85 unless otherwise noted. C C Note 2: Standard IEC 61000-4-2 with CDischarge = 150pF, RDischarge = 330, VN grounded. Note 3: These measurements performed with no external capacitor.
Rev. 2 | Page 4 of 11 | www.onsemi.com
4-Channel Low Capacitance ESD Protection Arrays CM1225
Performance Information
Input Channel Capacitance Performance Curves
(c)2010 SCILLC. All rights reserved. April 2010 - Rev. 2
Publication Order Number: CM1225/D
CM1225
Performance Information (cont'd)
Typical Filter Performance (nominal conditions unless specified otherwise, 50 Ohm Environment)
Figure 1. Insertion Loss (S21) VS. Frequency (0V DC Bias)
Figure 2. Insertion Loss (S21) VS. Frequency (2.5V DC Bias)
Rev. 2 | Page 6 of 11 | www.onsemi.com
4-Channel Low Capacitance ESD Protection Arrays CM1225
Application Information
Design Considerations
As a general rule, the CM1225 ESD protection array should be located as close as possible to the point of entry of expected electrostatic discharges. Use minimum PCB trace lengths to ground planes and between the signal input and the ESD devices.
Additional Information
See also California Micro Devices Application Note AP209, "Design Considerations for ESD Protection," in the Applications section at www.calmicro.com.
Figure 3. Typical HDMI ESD Protection with CM1225 Connection
(c)2010 SCILLC. All rights reserved. April 2010 - Rev. 2
Publication Order Number: CM1225/D
CM1225
Figure 4. Display Port ESD Proetction with CM1225 Connection
Rev. 2 | Page 8 of 11 | www.onsemi.com
4-Channel Low Capacitance ESD Protection Arrays CM1225
Mechanical Details
uUDFN-10 Mechanical Specifications, 0.5mm The 10-lead, 0.5mm pitch uUDFN package dimensions are presented below.
PACKAGE DIMENSIONS
Package JEDEC No. Leads Dim. Min A A1 A3 b D E e g L # per tape and reel 0.35 0.30 0.45 0.00 0.102 0.15 2.40 0.90 Millimeters Nom 0.50 0.02 0.127 0.20 2.50 1.00 0.50 BSC 0.40 0.35 0.45 0.40 Max 0.55 0.05 0.152 0.25 2.60 1.10 Min 0.180 0.000 0.004 0.006 0.095 0.035 uUDFN MO-229C
*
10 Inches Nom 0.020 0.001 0.005 0.008 0.098 0.039 Max 0.022 0.002 0.006 0.010 0.102 0.043
0.020 BSC 0.014 0.012 0.016 0.014 0.018 0.016
3000 pieces
Controlling dimension: millimeters
*
This package is compliant with JEDEC standard MO-229C with the exception of the D and E dimensions as called out in the table above.
Dimensions for 10-Lead, 0.5mm Pitch uUDFN Package
(c)2010 SCILLC. All rights reserved. April 2010 - Rev. 2
Publication Order Number: CM1225/D
CM1225
Tape and Reel Specifications
PACKAGE SIZE (mm) 2.50 X 1.00 X 0.50 POCKET SIZE (mm) B0 X A0 X K0 2.80 X 1.45 X 0.70 TAPE WIDTH W 8mm REEL DIAMETER 178mm (7") QTY PER REEL 3000
PART NUMBER CM1225
P0 4mm
P1 4mm
Rev. 2 | Page 10 of 11 | www.onsemi.com
4-Channel Low Capacitance ESD Protection Arrays CM1225
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any
products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800-282-9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81-3-5773-3850 For additional information, please contact your local Sales Representative Order Literature: http://www.onsemi.com/orderlit ON Semiconductor Website: www.onsemi.com
(c)2010 SCILLC. All rights reserved. April 2010 - Rev. 2
Publication Order Number: CM1225/D


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